NGEN: A massively parallel reconfigurable computer for biological simulation: Towards a self-organizing computer

McCaskill, John S., Thomas Maeke, Udo Gemm, Ludger Schulte, and Uwe Tangen. “NGEN: A massively parallel reconfigurable computer for biological simulation: Towards a self-organizing computer.” In International Conference on Evolvable Systems , pp. 260-276. Springer, Berlin, Heidelberg, 1996.
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NGEN is a flexible computer hardware for rapid custom-circuit simulation of fine grained physical processes via a massively parallel architecture. It is optimized to implement dataflow architectures and systolic algorithms for large problems. High speed distributed SRAM on the chip-to chip interconnect enables a transparent extension of problem size beyond the limits posed by the number of available processors. For simulated evolution tasks for example, this takes the effective population sizes up into the range of millions of strings without computational bottlenecks. Using FPGA technology, multiple processors per chip may be configured down to the level of individual gates if need be. 144 agent FPGAs are grouped in blocks of 4 and connected with one another via one of several possible broad band electronic frontplanes (36 channels per chip) which implement 2D, 3D or higher geometries. The communication of the parallel computation with a UNIX host workstation via VME-bus is mediated also by configurable interface FPGAs allowing problem specific communication needs to be respected. A separate 100 Mhz clock card frees the machine from the 16 MHz VME clock and allows designs to run at their optimum speed. Configuration files may be downloaded in series or parallel from the host workstation in less than a second. They may be created by user programs or commercial schematic entry or VHDL products. A run-time library for writing simulations in C which use the configurable hardware has been completed including a graphical interface allowing parallel symbolic debugging and display. The machine is a logical consequence of the shift of programming effort to effective communication in massively parallel applications. Its flexible structure also admits applications to real-time intelligent data acquistion tasks.

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